We have the ADuC7060 design working, code running and ADC values being output ok.
We are using the primary ADC. External reference 2.5V with Vref+/- connected to the analog ground and analog vcc
We have the HIGHEXTREF0 set.
We have 244mV on V- and 311mV on V+ ie 67mV input signal.
For gain of 4 we get 0x361828 which is 66mV
For gain of 8 we get 0x6C2EDD which is 66mV
For gain of 16 we get 0x78D5B3 which is 37mV ???????
By increasing the input common mode voltage so V- is 785mV and V+ is 836mV we get the correct value for x16 gain
This means the input common mode range is limited as you use the PGA. I could not find any limits on the data sheet highlighting this. Can these limits be added?