How should the ADV7181C be configured for NTSC square pixel output?
I don't see that you have to set up anything special on the input. I think you ony have to adjust the HS timing on the SDP output-- it's mentioned in the HS Configuration section of the SDP part of the manual.
Thanks for the reply to my question asking how to configure the ADV7181C for 640x480 square pixels out from an NTSC source, but given the documentation available in the manual I really don’t understand how that would give square pixels. Setting HSB and HSE wouldn’t give square pixels unless the LLC clock frequency changes, but that would seem to conflict with statements elsewhere in the manual. Maybe you can help me to understand this aspect of the part. Here’s what I have to go on - sorry there’s so much that follows, but I think it’s necessary background…Per Table 8, in ADV7181C_Manual_RevC.pdf, the SDP output format is 720 pixels (columns) by 480 lines (rows). From section 7.3 Analogue Video Signal Sampling:The ADV7181C has two main modes of operation for sampling the input video: When the SDP is enabled, fixed 54 MHz sampling is applied at all three ADCs. The SDP processes the video signal and, using a line length tracking processor, resamples the incoming video so that 720 active pixel are always generated per line. Refer to Section 8 for more details. Note that no user IP2PC settings are available for the PLL when in SDP mode as the PLL is controlled directly by the SDP. Displayed on a square pixel monitor, NTSC/SMPTE 170M digitized to 720x480 (I’ve seen this described as having “skinny pixels”) would have an aspect ratio of 1.5 (NTSC is 1.333), which would result in a horizontally stretched image. Because the number of lines is fixed (using 480 out of the actual 485), the only way to get square pixels is to sample at 24.54545 MHz. From http://en.wikipedia.org/wiki/Pixel_aspect_ratio:…ITU-R BT.601 specified that standard-definition television pictures are made of lines which contain exactly 720 non-square pixels, sampled with a precisely-specified sampling rate.…In order to convert analog video lines into a series of square pixels, the industry adopted a default sampling rate at which luma values were extracted into pixels. The luma sampling rate for 480i pictures was 12+3/11 MHz…For 2x oversampling, this is 24.5454 MHz. Here’s where it gets interesting: Table 19 in the manual includes an entry “NTSC Square Pixel”, and makes an erroneous reference to Figure 50 which should be to Figure 51 on page 131 instead. There’s no definition or other discussion of NTSC square pixel format other than as mentioned in Table 19. Now, if you multiply the NTSC line rate of 15.73 kHz by “Total LLC Clock Cycles” shown in the table for NTSC square pixel (1560), you get…24.5454 MHz! So, assuming that overrides the 720 (active) pixels per row, does the ADV7181C somehow adjust the PLL when you set HSB and HSE as shown, and how would it know, since all three rows of “Standard” type shown use the same setting. Alternately, does “NTSC Square Pixel” refer to some analog signal format I’ve never heard of and can find no reference to?One last question: On page 26 of the manual under the bulleted “SD-M” it states:SD in YPbPr format (without a modulated color component) is the only exception; it too can be accepted in and processed by the SDP. ADI, however, recommends that SD-YPbPr should be processed like any other component video signal in COMP mode and routed through the Component Processor (CP) block. Can you explain “SD in YPbPr format (without a modulated color component)”, and is the paragraph somehow relevant to getting square pixels from NTSC?
I was taking for granted that you have to change the pixel clock. You cannot get square pixels without the 25.5454Mhz clock.
The line on page 26 about YPbPr without a modulated color component is referring to component video. Given that they tell you not to do it anyway since there is a mode for that, I'm not sure why they even mention it. It has nothing to do with NTSC square pixel mode.
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