A am using the BF548 Ez kit Eval Board.
Have defined these pll divisors:
(25MHz x (MSEL=24)) VCO=600MHz
(600MHz x (SSEL=5)) SCLK=120MHz
my Uart divisor is: 0x0096 ( = 150) for EDBO = 1. => UART freq should be 800KHz.
120MHz/150 = 800KHz
But, when i am measuring the UART3 TX pin, i see 400 MHz.
didn't see anywere that the UART3 gets half of the SCLK freq (as timers get) or any other indication, to expect this to happen
How can i solve this problem?