A capture of the screen shot is attached in the word document.
Picture_Left: GUI interface of evaluation software (main)
Picture_Right: GUI interface of evaluation software (synthesizer settings)
Reference signal of 26MHz from Signal generator is connected to the REF_IN sma connector and LO_output sma connector is connected to Spectrum Analyzer.
- In Picture_Left;
[LO path and Modulator Control] tab à PLL enabled
[Output reference Mux Source] tab à Lock detect
- In Picture_Right;
Settings as shown, the signal capture on Analyzer shows the LO output – (see jpeg)
- How do we test if the lock detect of the PLL is already in locked position?
Any detail manual or instruction to set up & evaluate ADRF6601 EVB?