I'm having a problem with the ADV7604 where a video source device cannot read the internal EDID.
The ADV7604 is being used in a repeater application. I've setup the BCAPS and BSTATUS registers and written the KSVs to the KSV list. When I receive a AKSV update from the source device I then set REPEATER register 0x77 to 0x8f. The moment I do that the ADV7604 disables the EDID (REPEATER register 0x7d goes from 0x0f to 0x00). Before the source device sends the AKSV update the 0x77 and 0x7d registers are correct (0x77=0x8f and 0x7d=0x0f). What's also interesting is that after the AKSV update occurs the ADV7604 sets REPEATER register 0x77 to 0x10, which doesn't make any sense to me. I've checked with an I2C analyzer and I am definitely writing 0x8f into register 0x77. It's the ADV7604 which is setting 0x77 to 0x10 when an AKSV update occurs.
I've noticed that the Hardware documentation states that IO register 0x79 bit 5 should be set to clear an AKSV update, but the software documentation states that IO register 0x80 bit 5 should be set instead (0x79 is a read only register). Which is correct?
By the way, I've successfully implemented this capability in a product using the ADV7441A. I've been using the same code - modified, of course, for the differences in the ADV7604.