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SPORT I2S Timing problem ..

Question asked by qian on Dec 28, 2010
Latest reply on Dec 29, 2010 by DeepV

SPORT configured for I2S mode ..

 

Configured as:

 

*pDIV0 = 0x00170023; //0X17=23      CLKDIV = 331.776 /(4*(2*48*24)) - 1 = 0x23 //???
*pSPCTL0 |= (SPEN_A | SLEN24 | MSTR | OPMODE |SPTRAN);

 

Oscilloscope Display for each FS has a 48 CLK ..
But the chips(cs8406Hardware mode I2S) need to 64clk ...
Timing diagram:

i2s.jpg

 

How can I configure the SPORT to meet the requirements ..

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