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ADV7403 PLL Stability in HD

Question asked by cdsteinkuehler on Dec 16, 2010
Latest reply on Jan 15, 2014 by IanC

We are seeing some PLL stability issues in HD video modes (1080i and 720p), SD modes appear fine.

 

I can pretty much get rid of the issue by switching to the tri-level sync stripper (TRI_LEVEL=1 0x69[7]), and by setting the PLL phase detector gain to the lowest level (PLL_QPUMP=0 0x3C[2:0]).  I also played a bit with the DLL timings, but we are properly anti-alias filtering the signal being fed into the ADV7403, so the DLL setting had no effect (as expected).

 

Is there any reason not to use the modified values for PLL_QPUMP and TRI_LEVEL by default with HD signals?

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