Aduc7061 rev B datasheet page 74 says:
Users have control over the period of each pair of outputs and over the duty cycle of each individual output.
But the same page on the second column shows a figure, and notes:
The low-side waveform, PWM1, goes high when the timer count reaches PWM0LEN, and it goes low when the timer count reaches the value held in PWM0COM2 or when the high-side waveform (PWM0) goes low.
I have an application, where I need two PWMs with same Frequrency (100Hz), but I must have ability to control their duty cycle independently.
On my working prototype, I tried all sorts of possibilities (including invert) to make this happen - to no avail.
The restriction that PWM1 falling edge must come before PWM0 falling edge - make it dependent to each other.
Do you guys know a trick that I can use to overcome that?