The ADV7123 datasheet implies that all 3 VAA pins be connected to the analog power plane. However, the reference design shows pin 13 being separately tied to the "VCC3V3_FPGA" power. This is suggesting that pin 13 is used to power digital input lines only and should be filtered separately from power pins 29 and 30.
The reference design adv712x.pdf and is located at: http://ez.analog.com/message/9286#9286
What type of filtering to pin 13 should I use to get lowest noise / highest performance out of this part? Should it be included or excluded from the filtered VAA for pins 29 and 30?