I am working on ADSP-BF518F with VDSP++5.0update7. I have designed my own hardware with the reference of BF-518 EZ-kit. I have tested all the peripherals, lwip and VDK examples with my hardware and all are working fine.
Using TCP protocol with stream sockets i am sending Mp3 file from server to client and playing back the file in client using Mp3_decoder APIs. i am enabling the Instruction and data cache and generating cplb file through write-back mode. But FSS doesn't require cache so i am disabling cache for the two banks of userheap which is in SDRAM BANK3 and which i am using for FSS. System heap which is used by the lwip is also in SDRAM and for which cache is enabled.
Now while reading the file from SDcard using FSS the fread() func is causing SEQSTAT to 0x00002026 .i.e EXCAUSE = 0x26 which means Data access cplb miss and cotrol is jumping to __cplb_miss_without_replacement section. When i am disabling both instruction and data cache , after fread() the control is jumping to exception handler causing SEQSTAT to 0x0000E024 .i.e EXCAUSE = 0x24 which means data access misaligned addr violation and HWERRCAUSE = 0x03 .
What might be the problem for this error? Please help me....