Please look at the pictures,how do I solve this problem? Who can provide me the steps to solve the problem?
The full scenario is not clear from the screenshot. But as far as the memory is concerned, there are multiple options to address this:
1. The 32 bit state memory required for this schematic is about 280 KB and the buffer allocated in the application has only about 140 KB. You can increase the state memory buffer size in your application, but it won't be possible to allocate 280 KB from a single L1 memory block. The alternative is to reduce the 32 bit state memory requirement of the schematic through the following options.
2. The framework consumes about 130 KB of state memory. This is because either your BlockSize is too large or you have defined large scratch memory requirement for one or more of your modules. You could try to reduce these values if higher values are not required, thus bringing down the state memory requirement.
3. Though all the modules are not visible in the screenshot, I assume that one or more of external modules consume a big chunk of state memory. You could use either StateB or StateC for these modules and map them to external memory. Refer to Algorithm Designer Guide for more details.
JJoseph,thanks.That's because I have ten channels, each channel to 200 ms delay.I have noticed that the State C was very big,if can use, it will be enough to use.
What is your target processor?
I use the processor is ADSP21489.We have a external SDRAM,but I don't know how to use it.
If I want to increase the state memory buffer size in my application,how much size to be increased.In addition to modify the state memory buffer size,what do I have to modify.
If you want to increase the state memory size in your application, you have to increase the size of adi_ss_mem4 buffer. How much to be increased depends on your requirement and memory availability in the target application. If there is not enough space available in the memory block, you may have to rearrange the buffers to make more room for adi_ss_mem4. Please note that maximum possible memory is already allocated in the default application. Hence you will have to make some buffer rearrangement to make more room. Once you increase the size, please enter the new size (in bytes) in the "32 Bit State" filed under "memory Size in Bytes" group of settings in the IC Control Window.
Alternatively please plan to move some of the state memory required for your custom modules to external memory (State B, State C). This will be more effective than the above option.
When I adjust my State to 168960, ssh4h compiled can be through.
Please see below
When I increase the size of adi_ss_mem4 buffer,CCES compiler error.How to solve?
First regarding the host changes. SigmaStudio host does not check the memory availability on the target. It just compares the schematic memory requirement against the value you enter in the IC Control form. That is why it is passing when you increase the value. This is only a check and this is in no way affecting the memory allocation on the target.
Now coming to the target side, there is not enough memory on the memory block where the State buffer is mapped and that is the reason why the compilation fails. You will have to rearrange the buffer placement and map some of the state memory required by your SigmaStudio modules to StateB and StateC to solve this.
I rearrange the buffer placement and map some of the state memory required by my SigmaStudio modules to StateB.Please see below
#define pStateIntPtr ((int32_t *)(pBlkAlgoInfo->pState)) adjusted to #define pStateIntPtr ((int32_t *)(pBlkAlgoInfo->pStateB))
state adjusted to 0,state B adjusted to 94+512*RepCount.
I use ADSP21469 development board to test the SSH, no output.
Such a change, right?
Just to ensure that your basic setup is OK, could you please execute the setup without the delay module and check whether Audio is there.
Once that is confirmed, you will then have to ensure that the address of adi_ss_mem8 (which is used as StateB buffer in the application) is correctly entered under the StateB address field in IC Control window.
When execute the setup without the delay module,there are audio output.
In IC Control window,I didn't see the StateB address,but it has the Code B address that is 600000.Please see below
You are right. There is no StateB address filed in the IC control window.
On the modifications that you have made: Unfortunately pStateIntPtr (which you modified) is not used in the code. So you will have to modify all pState in the code to pStateB.
Additionally you will have to identify a buffer in your application to be used as your delay buffer, and the address of the delay buffer should be entered in the 'Ext Buffer Ptr' field on the delay cell.
According to your requirements:modify all pState in the code to pStateB.OffchipDelayExtPort2SecStateB module is normal work.When I use OffchipDelayExtPort2SecStateB module,the address of the delay buffer in the 'Ext Buffer Ptr' field on the delay cell is 9464832.
I use the same method to create OffchipDelayExtPort2SecStateC module
When I use OffchipDelayExtPort2SecStateC module,the address of the delay buffer in the 'Ext Buffer Ptr' field on the delay cell is what? I try to enter a lot of different address, it can't work.you can tell me which the address will beentered in the 'Ext Buffer Ptr' field on the delay cell.
I use a ADSP21469 development board.
This module requires two memory buffers to work. The first one is the state memory, which for a single delay (without growth) depends on the BlockSize. This is a temporary buffer used for moving the audio samples to the delay buffer. This is where State or StateB is used.
The second buffer is the delay buffer, which can be any unused buffer. The size of this buffer depends on the maximum delay to be supported. The address of this buffer is entered in the 'Ext Buffer Ptr' field.
Ideally there is no relation between these two buffers. The user should ensure that the buffer used as Delay Buffer (pointed by 'Ext Buffer Ptr') is not used/allocated for anything else.
According to what you said,the StateC can not serve as the first buffer .
If an SSH there are multiple OffchipDelayExtPort2SecStateB module,the address of this buffer whether can be the same is entered in the 'Ext Buffer Ptr' field .
There is nothing preventing from using StateC as the first buffer. When there are multiple OffChipDelay modules inserted in the schematic, each should use a different delay buffer and hence different 'Ext Buffer Ptr' entry.
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