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Stability of clock generation and distribution devices output skews

Question asked by arrug on Dec 6, 2010
Latest reply on Dec 6, 2010 by enash

Dear all,

we've a beamforming application in which we need to synchronize 40 ADCs (AD9600) as good as possible. Therefore also their sampling clocks need to be synchronized perfectly.

To distribute (and generate) the ADC sampling clocks of 100 MHz, we are thinking about using "Clock Generation and Distribution" devices like the AD9522-5: 12 LVDS/24 CMOS Output Clock Generator.

The maximum output skew (LVDS outputs) is specified in the datasheet for LVDS outputs across multiple with 432 ps.

If we calibrate each output skew how stable are these measured output skews? Will they change when the device gets turned off and on again? Is there a big dependancy on the temperature?