I have a 10MHz TTL output OCXO. but I want to multiply it to 50MHz. The PLL multiplication is not good ,as the PFD phase noise is too high.

I think I could use a 50MHz bandpass filter to get sine wave from the square wave. But I don't know how to design the bandpass filter.I mean the input and output impedance.

besides, if I have to amplify the filter output, what amplifier should I use? OP or low noise AP? even could an active filter be used at such high frequency?

With careful design you should be able to get good performance using a PLL circuit.

I would recommend the ADF4002 to multiply directly from 10MHz to 50MHz. For best

phase noise/jitter you would probably have to use a VCXO and select the loop bandwidth

to optimise the phase jitter in whatever integration bandwidth you are interested in (e.g. 100Hz to 1MHz).

I have attached an example design in ADIsimPLL. I did not know your OCXO phase noise

performance so I just put in an example phase noise value.

The alternative as you mentioned would be to square up the OCXO output and filter out the 5th harmonic.

This should be possible to do using a discrete LC approach. I guess you will need a pretty high order filter to

sufficiently attenuate the other odd order harmonics. There are lots of filter tools available to simulate this.