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Exact HDL implementation of AD9361 PRBS

Question asked by BlakeM on May 5, 2015
Latest reply on Dec 21, 2015 by rejeesh

Hi, I'm trying to implement a tuning module for a custom board which uses the 9361. I'm referencing your NoOS code, the 9361 HDL from Github and the BIST FAQ. In the FAQ, the following code is given for generating the 9361 PRBS:

 

prbs_data <= { (prbs_data[ 0] ^ prbs_data[ 1] ^ prbs_data[ 2] ^ prbs_data[ 3] ^
prbs_data[ 4] ^ prbs_data[ 5] ^ prbs_data[ 6] ^ prbs_data[ 7] ^
prbs_data[ 8] ^ prbs_data[ 9] ^ prbs_data[10] ^ prbs_data[11] ^
prbs_data[13] ^ prbs_data[14] ), prbs_data[15:1] };


However, I don't see anything corresponding to this in the HDL. The closest thing I see in axi_ad9361_rx_pnmon.v is:


  function [15:0] pn0fn;

    input [15:0] din;

    reg  [15:0] dout;

    begin

      dout = {din[14:0], ((^din[15:4]) ^ (^din[2:1]))};

      pn0fn = dout;

    end

  endfunction

 

and then there are a number of other sequences (PRBS_P09, PRBS_P11, PRBS_P15, PRBS_P20). From tracing through the code, it seems that PRBS_P09 may be the one that's used, but the register map mentions something about the use of a device specific PRBS, so I'm confused.

 

Can you provide some guidance on which of these sequences I should use for comparison purposes? Also, how I should pad the 12 bit ADC data to work with the 16 bit PRBS? Thanks.

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