We would like to compare the jitter performance of HMC769LP6CE and HMC702LP6CE + HMC511LP5E for parts selection. Do you have jitter data @9.1GHz (10kHz ~ 40MHz) of them?
The Hitt-PLL tool can simulate phase noise at 9.1G and calculate jitter for the 10 KHz to 40 MHz integration limits. The HMC769 model files are included as part of the tool installation package. Set the output to 9.1G and change the Noise Integration to your desired band. This gives a total integrated jitter of 60fs with 50MHz reference and 2.5mA charge pumps.
Now load the HMC702 model file and make the following changes to insure a valid comparison (I've attached a model file you can just load):
With these changes the loop BW is identical to the HMC769 simulated value. The performance is a bit worse -- 89fs compared to 60fs for the HMC769.
This is expected since the PLL used in the HMC769 has better phase noise and spurious performance then the HMC702.
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