I'm trying to interface an LVDS input data stream to the ADN2816.
Previously I was using capacitors in the line but found they were picking up quite a bit of noise when the data stream was off which was producing unwanted data and clock outputs.
I was planning on DC coupling the inputs but I need to use a resistor network to step up the common mode voltage from LVDS to CML.
The issue I am having is associated with the internal pull up resistors on the PIN and NIN input pins. I believe these are connected to VRef using 50ohm resistors but there may be more to it. I also understand that VRef is dynamic and I am not entirely sure how this is controlled.
Does anyone know what the internal circuitry associated with PIN & NIN looks like and how the VRef voltage is controlled/changes?
Also if anyone has any advice with regard to the above that would be greatly appreciated.