om my board There is one ad7799 and ad420 .
after setup ad7799 I realized that unlike ad7799 the ad420 need clock
to be low in ideal state .
is there any solution for this problem ?
and as i see in ad420 it accept all data in Data in and just after rise edge apply data .
is there probably any problem that on same spi there is another communication .
is it guarantee that just the last word before latch is applied ?