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DAG register write in SIMD mode leads to 2 consecutive writes

Question asked by hagen on Apr 24, 2015
Latest reply on Sep 22, 2015 by Harshit.Gaharwar

Hi,

(only) in SIMD mode the SHARC (seen with 21369 and 21469) writes two consecutive 32bit values of the same DAG register contents to internal memory when issued something like the following instruction:

 

pm(i15,m15)=i0;

 

That looks at least like an "unexpected feature" if not a bug to me. DAG registers do not shadow a SIMD sibling. What for should that be good? In any case it should be mentioned in the manuals since this could be a pretty hard to find cause for misbehaving software.

 

Cheers,

Hagen.

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