(only) in SIMD mode the SHARC (seen with 21369 and 21469) writes two consecutive 32bit values of the same DAG register contents to internal memory when issued something like the following instruction:
That looks at least like an "unexpected feature" if not a bug to me. DAG registers do not shadow a SIMD sibling. What for should that be good? In any case it should be mentioned in the manuals since this could be a pretty hard to find cause for misbehaving software.