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ad9364 no-OS driver run error,Floating point exception

Question asked by east.xie on Apr 23, 2015
Latest reply on Apr 25, 2015 by east.xie

I am working on ad9364 on linux2.6.30, and I am using no-OS driver.

Because AD9364 is used instead of AD9361 the following changes are make to the default_init_param structure:

     - two_rx_two_tx_mode_enable has to be set to 0

     - two_t_two_r_timing_enable has to be set to 0

     --xo_disable_use_ext_refclk_enable has to set 1, because I use ext sine wave generator

 

but in the run time ,there are often occur some error 'Floating point exception'.   why is the issue, does the no-OS driver bug or the runtime problem?

 

Calibration TIMEOUT (0x247, 0x2)

....

Calibration TIMEOUT (0x287, 0x2)

.....

and finally in ad9361_gc_setup   print :@@

ad9361_gc_setup

Floating point exception

 

The following is what console print :

[root@wireless-0945 /mnt]# ./ad9361_generic

ad9361_reset: by GPIO

PRODUCT ID  value: : 0xA

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

debug: finished  register_clocks(phy)

debug: finished ad9361_init_gain_tables(phy)

ad9361_setup

ad9361_set_dcxo_tune : coarse 8 fine 5920

ad9361_set_trx_clock_chain

ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 30720000 30720000

ad9361_set_trx_clock_chain: 983040000 122880000 122880000 61440000 30720000 30720000

ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 245759803 Hz Parent Rate 983039215 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 122879901 Hz Parent Rate 245759803 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 122879901 Hz Parent Rate 245759803 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 122879901 Hz Parent Rate 122879901 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 61439950 Hz Parent Rate 122879901 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 61439950 Hz Parent Rate 122879901 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 30719975 Hz Parent Rate 61439950 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 30719975 Hz Parent Rate 61439950 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 30719975 Hz Parent Rate 30719975 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 30719975 Hz Parent Rate 30719975 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rssi_setup

 

 

ad9361_auxadc_setup

ad9361_rf_port_setup : INPUT_SELECT 0x3

ad9361_pp_port_setup

ad9361_auxdac_setup

ad9361_auxdac_set DAC1 = 0 mV

ad9361_auxdac_set DAC2 = 0 mV

ad9361_auxadc_setup

ad9361_ctrl_outs_setup

ad9361_gpo_setup

ad9361_set_ref_clk_cycles : ref_clk_hz 40000000

ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 80000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 80000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 80000000 Hz

ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 0

ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 1

ad9361_rfpll_set_rate: Rate 1175000000 Hz Parent Rate 80000000 Hz

ad9361_fastlock_prepare: RX Profile 0: Un-Prepare

ad9361_rfpll_vco_init : vco_freq 9400000000 : ref_clk 80000000 : range 2

ad9361_rfpll_vco_init : freq 9269 MHz : index 13

ad9361_load_gt: frequency 2350000000

ad9361_load_gt: frequency 2350000000 (band 1)

Calibration TIMEOUT (0x247, 0x2)

ad9361_rfpll_recalc_rate: Parent Rate 80000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 20000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_set_rate: Rate 1175000000 Hz Parent Rate 40000000 Hz

ad9361_fastlock_prepare: TX Profile 0: Un-Prepare

ad9361_rfpll_vco_init : vco_freq 9400000000 : ref_clk 40000000 : range 0

ad9361_rfpll_vco_init : freq 9269 MHz : index 13

Calibration TIMEOUT (0x287, 0x2)

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 20000000 Hz

ad9361_rfpll_recalc_rate: Parent Rate 40000000 Hz

ad9361_load_mixer_gm_subtable

ad9361_gc_setup

Floating point exception

[root@wireless-0945 /mnt]#

 

Thanks!

Outcomes