I have below question about the function of clear and load in control register of AD5724.
After using clear or load of register , please let me know your advice if we need to set any setting for disable of clear or load.
Do I need to set any setting for disable of clear register after addressing the register of clear ?
Or, if we write next data to DAC register and next data is loaded, is clear condition disabled automatically ?
After addressing the register of load, do I need to set any setting before writing next data to DAC register or next DAC data is loaded ?
Or, can we write next data to DAC register and load next data without anyt setting ?