I'm using AD9364 on my own board and its No-OS drivers. Reference signal - rectangular pulses, 10MHz, 1.3 Vp-p (I also used 900mVp-p). When I try to init the AD9364, I can see that RFPLLs are not locked. I tried to multiply my reference clk in AD9364 (by setting ref scale, Rx path and Tx path dividers), but it doesn't take effect.
I have some questions. Can I use the rectangular pulses as reference clk? How the AD9364 perceive those pulses?
I put ref_clk to out_clk, and when I watch the signal "out_clk", it is not rectangular pulses.
When I used sine wave (for test) as reference clock, RFPLLs were locked correctly. But, to be honest, I didn't watch the "out_clk".
Help me, please.
P.S. Sorry for my bad English.