What is the minimum phase shift step I can use when my master clock is 8Mhz and output clock of my DDS is configured for
I know the DAC of this DDS is only 10bits but but using my oscilloscope I can only phase shift my clock output in 125ns intervals, which is one cycle of my master clock ( 8Mhz ).
is this all correct? This DDS is working right?
I thought the phase shift was based on the formula : phaseregister * (2pi/4095)