When SPI active, Does this device will ignore writing data less than 8bit?
Our system may send a command when AD5290 power up.
I want to know whether CS(=Low edge) reset the state machine of SPI .
Every time when CS goes from logic high to logic low, the clock loads data into the serial register on each positive clock edge. The AD5290 uses an 8-bit serial input data register word that is transferred to the internal RDAC register when the CS line returns to logic high. If you have only 7 clock cycles, the command will be ignored. Extra bits will also be ignored.
Thank you for your prompt reply.
My worries were cleard up.
Retrieving data ...