We are a team working on a mechanical measurement device that evaluates structures based on the input from different sensors. The computing capabilities, size and power consumption of the ADSP21479 make it an excellent choice for our task.
However, we are having serious issues determining whether the ADSP21479 I/O processor meets the requirements for our problem. From the data sheet and several documents we are unable to even tell what the I/O processor exactly is or does. We would like to know if the device meets our requirements before we invest the time and money to start working on an evaluation board.
We would like to be able to simultaneously perform the following two tasks, with a total throughput to the internal SRAM of 130 MB/s:
Task 1: Sample a 12-bit 65 MSPS ADC [Analog Devices AD9629] and store the result in a circular buffer of about 256 KB in the SRAM. Do this until told to stop. The ADC has it's own clock for low jitter:
circular_buffer[address] = INPUT
address = (address+1) % buffer_size
Task 2: Sample a 16 bit, 2 MSPS serial ADC [Analog Devices AD7985]. The ADC has it's own clock for low jitter. Store the data in a circular buffer. Abort this process and also task 1 when N samples have been acquired after the input signal exceeds a certain value "trigger level".
current_byte = 0
for i = 1 to 16
spi_clk = 1
spi_clk = 0
current_byte = (current_byte << 1) + spi_input_pin
circular_buffer2[address2] = current_byte
address2 = (address2+1) % buffer2_size
if current_byte > trigger
trigger_has_happened = 1
if samples_since_trigger > value
abort task_1 task_2
Both circular_buffers are 16 bits long (i.e. C short type). We can tolerate some misalignment between the two sensors 10-20 microseconds.
It would be very helpful for us if we are able to implement these two tasks inside the DSP. Otherwise we'll require an FPGA with its own SRAM, which greatly increases the power consumption and size of our device.
Can the input processor from the ADSP21479 do that?