Hi We are planning to use AD1937 in one of our designs .
Our requirement is 4 mono audio input and 4 mono audio output.
Can we use AD1937 for this kind of application.
Yes, you certainly can use this part for your application.
You may be asking this because of the way the analog inputs and outputs are enumerated in the datasheet. ADC1L, ADC1R, ADC2L, ADC2R...etc. The register settings for the mute and volume functions are for each individual ADC or DAC and they are not treated as stereo pairs in the hardware or in the register map.
Thanks for your reply.
We have contacted Analog India for review of our schematics with AD1937.So they had asked us to post in EZ analog.Can you review the schematics we have done.Because we don't want to have any issue after the board comes Since this is critical for us can you help us.
This reply is for anyone else who reads this post. I have reviewed their schematics off-forum and replied to them directly. I will paste in my reply here since most of it is general in nature and does not divulge any of the customer's proprietary design details.
Here is my reply:
The DAC outputs appear to be shorted together. If the customerwants to use two DACs set with their polarity reversed to cancel out any commondistortion products, then they will need to actually sum the two outputs usinga proper summing node and amplifier. Shorting them together can cause highcurrents to be present whenever the two outputs do not agree. So I would notjoin two DAC outputs directly together. I would just leave one of them unterminated or sum them actively.
I see where there are provisions for using all the I2S inputs tothe DACs or to only use DSDATA1. This is fine but they need to have provisionsfor tying the unused digital inputs to ground. This will prevent and signalsfrom producing output from unused DACs, or just using power when it switchesfrom noise.
The same goes for any unused clock inputs. If any of the ADC orDAC clocks are unused then set them to be slaves and ground them. The unusedASDATA output can be left floating. I also see that the MCLKO output isterminated with a 10K, that is certainly a fine way to terminate it. I wouldalso shut off the output in software.
I see they are using two grounds, Audio and digital. This is notthe way we recommend this be done. It is best for this part to ground bothtogether. This is the way we do it in our reference designs. Inside the partthe impedance between the two grounds is very low, 25 ohms or so. There areseveral other reasons. If you still choose to keep the grounds separate thenthe FILTR and CM bypass caps need to be tied to analog ground.
The next step is to make sure the PCB layout is done properly.Now, I recently answered a similar question for another customer. I will pasteit in here although some of these details you are doing , like the seriesresistors on the clock and data lines.
Regarding the PCB stackup, there needs to be power and groundlayers between all the signal layers. So the PCB needs to have at least fourlayers. If you go more than six layers then there needs to be a power or groundplane adjacent to each signal layer. On our eval boards we also put a groundfill on the signal layers but that is not required.
If you do put a ground plane on the top layer and there ends upbeing a ground plane under the part, then the plane needs to have a grid ofvias to the ground plane. We usually do a grid of nine vias. Also, have the padunder the part stand by itself and not connect to any of the part ground pins.This allows for the bypass caps to be more effective. I will explain that laterin this message. The other reason is to ensure that there is no path of leastresistance from the digital ground pins to the analog section ground pins.
The 100 nF bypass caps need to be as close to the pins aspossible. The important part of this is how the vias to the power and groundplanes are placed. Place the cap between the pin and the vias. This will enablethe cap to be the most effective. Do not place the via between the pin and thecap and do not place the via after the pin such that the pin is in the middleof the cap and the via. The trace should start at the pin, go to the cap thento the via. The 10 uF caps are not as critical and can even be placed on thebottom of the PCB.
The Loop filter components are important. Again, I would try toavoid vias but in this case it is more important to be close by and not faraway from the part.
The FILTR pin and the CM pin also need to have the bypassingclose by. The 100 nF needs to be close to the pins and the vias be away fromthe pin so the cap is between the pin and the vias. The 10 uF caps can befurther away but I would try to keep them close. The more quiet these nodes arethe better the performance. So long traces provides a risk of unwanted signalsentering the part.
I would use a single ground plane for a combined net of digitaland analog ground. That is the way we build our eval boards. I would not placea ferrite bead in series with the return to the power supply. You want theimpedance to ground to be small at all frequencies. You can use a ferrite beadon the DVDD power feed but make sure there is proper decoupling on each side ofthe ferrite bead.
Another thing we do is sprinkle a few 100 nF caps around theedges of the PCB. This helps to prevent the ground and power planes fromradiating any RF signals. If you choose to use a ground flood on the top andbottom layers (or internal for that matter), I would place many vias around theedges of the PCB to keep the planes from radiating.
Then the last thing is paying attention to signal integrity. Thesimplest way is to include some series resistors at all the digital signalpins. That would be the LRCLK, BCLK, MCLK, and the serial data lines. Thevalues would have to be determined using simulation but the idea is to preventovershoot and undershoot.
So all these small details all add up to a stable low noiseenvironment for the part to operate. This will help the analog portion of thepart have less noise and since the PLL is in the analog section of the partthis will help the jitter specifications as well. In addition, this all shouldhelp prevent EMI radiation issues.
Thanks for the opportunity to review your schematic.
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