And any body please help me I want to implement differetialy 8 psk HIL example as I have implemented for qpsk with fmcomms3 .so simulink model I will make but how to do with hdl reference design or xilinx bloxkset?? Any idea or suggestions?
Who makes & supports Sysgen? Last time I checked:
It was Xilinx, not ADI.
If you need Sysgen support, try the Xilinx forums for their DSP tools.
Once you create something in Sysgen, we can help you figure out how to integrate that into the ADI reference design.
Moved to Linux Software Drivers.
If you have successfully implemented QPSK, moving forward to 8-PSK should be in a similar approach. Can you be more specific about your question? Suggests in what aspect are you looking for?
Want to upload d8psk model in zed board so either sysgen blocks or vhdl or any other format?
I am not sure what exactly your question is:
If you are asking how to use sysgen blocks, please take a look at this example: http://www.mathworks.com/help/hdlcoder/examples/using-xilinx-system-generator-for-dsp-with-hdl-coder.html
If you have a question regarding 8 psk modeling in Simulink, please contact the technical support at MathWorks.
If your question is about our hardware or reference design, please follow up in this post.
My question I want to make my whole RF chain in sysgen so need ur help how to initiate??
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