We are using the ADT7410 on an I2C bus with several other I2C devices.
Our bus runs at 100 KHz (standard mode).
The SCL/SDA rise time for ADT7410 is quoted at 0.3uS for 0-400Hz on the
All of our other I2C devices and indeed the I2C standard quote a rise time of
1uS for 0-100KHz and 0.3uS for 100-400Khz.
Our bus currently has a rise time of 0.5uS approx which technically is out of
spec for the ADT7410.
My question is therefore for 100Khz operation does sthe ADT7410 still require a
rise time of 0.3uS? or can it tolerate up to 1uS as the I2C standard states?
I saw a very similar query answered on another Analog part which stated that it did need 0.3uS at all frequencies.
If the ADT7410 does indeed need a rise time of 0.3uS at 100KHz then the device does not comply with the I2C standard.
I realise stronger pull ups would fix the issue but surely the device must comply with the standard?