I've been testing the AD9767 14 bits DAC with the next simple test tone:
Form a fpga development board a tone is continuosly sent to the AD9767 with the next I/Q samples:
I = 1,0,-1,0,... (same for Q delayed 1 sample). I'm using only one of the I or Q port.
The desired output frequency is 1/4th of the sampling frequency but also even harmonics appears.
The output configuration is a RC filter in each current output leg of the DAC and the voltage signal
is converted to single-ended with a balun transformer.
Is there any way to eliminate or to reduce even order harmonics? How much the reduction would be?