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AD9388A auto graphics mode with interlaced signals

Question asked by DavidF on Nov 29, 2010
Latest reply on Dec 1, 2010 by DaveD

Hello,

 

I want use the AD9388A in auto graphics mode while receiving component interlaced signal from the analog input. I'm trying with 1080i60 (trilevel sync) and 480i60 (bilevel sync), but didn't succeeded.

The incoming resolution is recognised appropriately based on the BL, LCF, LCVS, FCL values and the STDI_INTLCD bit.

 

I'm setting the following registers if 1080i60 is coming after powering up the chip:

 

42 BA A1     HDMI Simultaneous mode enable

42 05 02      Autographics mode

42 06 07

42 87 E3        PLL_DIV_MAN_EN

42 8F 03     FR_LL=848

42 90 50

42 AB 23   LCOUNT_MAX=561

42 AC 10

42 7C 00       PIN_HS=0, PIN_VS=0

42 91 50       set interlaced bit

42 B7 17       ADI recommended write

42 81 D0      GR_AV_BL_EN=1

42 7B 0A     AV_CODE_EN=1, AV_BLANK_EN=1

42 69 80      Tri-level sync  (1080i video!)

42 85 01      SSPD_CONT=0   (I've experienced instable picture with component signals without this)

42 A2 0E     CP_START_SAV=232

42 A3 88     CP_START_EAV=2156

42 A4 6C   

42 A5 23   CP_START_VBI=560

42 A6 00   CP_END_VBI=20

42 A7 14

42 A8 23  START_VBI_EVEN=560

42 A9 00  CP_END_VBI_EVEN=20

42 AA 14

 

I use the DE, HS and VS signals on the output. With the settings above, there is no vertical sync on the output, however Hsync and DE is present. Non-interlaced resolutions works well with similar settings in auto graphics mode. If I set CP_DEF_COL_AUTO to zero, I see the image rolling vertically and horizontally.

I've also attached a register dump about Main Map, however of course the write only registers can't be dumped here.

 

Any help would be appreciated.

 

David

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