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[ADV7181D] HS/VS/Field output timing when using the Control Registers and LLC2 (13.5MHz).

Question asked by Tamu on Apr 1, 2015
Latest reply on Oct 5, 2015 by Tamu

Hello,

 

I have questions about HS/VS/Field Control Registers of ADV7181D.

 

Question 1:
When I use HS Position Control registers (address:0x34, 0x35 and 0x36 etc.) and LLC2 (13.5MHz),
is the HSYNC output timing changed based on LLC1 (27MHz)?
I have evaluated about this. The HSYNC output timing seems to change based on LLC1 (27MHz)
even if we use LLC2 (13.5MHz) for LLC pin.
Please refer attached pptx file page 2 and page 3.

 

Question 2:
We want to know HS/VS/Field output timing when we use LLC2 (13.5MHz) with our setting.
If question 1 is yes, I think we can calculate HS/VS/Field output timing when we're using LLC2 (13.5MHz)
from output spec with LLC1 (27MHz) on the datasheet.
Please refer attached pptx file page 5 ~ page 7.
You don't have to guarantee them. (If possible, we want you to guarantee them, though.)
It's good that we can use these timing values for reference.
I'd like to have your comment. What do you think about attached pptx file page 5 ~ page 7?

 

Also, I attached the script file I'm using.
We want to know HS/VS/Field output timing when we use LLC2 (13.5MHz) with our setting.
Our setting is "##1 Our Register Setting##
:AUTODETECT CVBS IN NTSC/PAL/SECAM, 16-Bit 422 encoder with Sync Control:" on the script.

 

Thank you!
Best regards.

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