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ADV8005 Audio Error

Question asked by Kikka on Mar 31, 2015
Latest reply on Apr 2, 2015 by Kikka



ADV8005 is used for HDMI Tx only. (It means we don't use scaler function, OSD function and so on)


We have written the following register at the end, originally.


1A ECE8 F0 ; soft_turn_on, tmds clk_en


Then, it occurred that ADV8005 could not output audio packet. (1 time per 400 times)


Next, we have written the register based on your script order.


1A ECE1 FC ; normal bias Current for Gear 0

1A ECE3 D0 ; use analog lock filter, 1ms wait for PLL to settle at one gear

1A ECE8 F0 ; soft_turn_on, tmds clk_en

1A ECEA 1D ; set clock op level, clkDRV_level = 500mV, enable cross_coupled inverter for duty cycle


Then, audio error disappeared.


Do you think the order of register writing affects audio output? (especially, 1A ECE8 F0)

Would you please tell us your  idea of the relationship between the order of register writing and audio error?


Your reply is most appreciated.


Best regards.