I have a product that uses two ADF4351 PLLs sharing a common reference. When I set the two chips to produce the same output frequency about 50% of the time if I re-program them or intentionally glitch the reference they will become unstable.
If I tune them to different frequencies there is no problem. If I tune them to multiples of 5 or 10 MHz (the reference is at 10 MHz) there is no problem.
I have played with almost every chip setting there is to play with with no change in failure statistics. That includes putting one channel in fractional mode and the other in integer mode.
If I use a tuning frequency lower than about 1200 MHz the problem goes away. That suggests some kind of crosstalk.
I have used external supplies for one of the chips. I have filtered the reference. I used a completely different connection of the reference for one of the chips.
I completely redesigned the loop filter for one of the channels.
I can put my hands all over the circuit and I cannot get the problem to go away if it is there or to come back if it is not. It is very stable in one state or the other.
It seems to be a kind of oscillation that can be broken by glitching something - either the reference or the loop control voltage. Basically if I make the loop lose lock for a moment I can either put it into or out of this state.
I have been looking at the artwork for two weeks and I don't see anything obvious.
Has anyone seen this problem and have any suggestions to correct it?
Any help would be much appreciated.