I would like to clock the AD9129 at full-speed and I am wondering if the AD-DAC-FMC-ADP board bandwidth will allow this. If not, what is the maximum speed that it would allow? Thanks.
Can or will or might?
We had an old (no longer supported) project:
For ML605 that it worked, but I think it depends on the carrier. Due to the way that some are pinned out, they will be split across FPGA banks, and the FPGA developers will run into issues.
Since we have no access to SPI on that board, we decided to not support it anymore, and the version the the design that is posted is old/does not work on modern FPGAs or modern tools.
Yes, it should allow it.
You may want to check out:
Which is a FMC compliant board with 2 AD9129s on it. It runs at full speed.
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