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HSC-ADC-EVALCZ Virtex 4 compiling problem

Question asked by rogerd on Mar 23, 2015
Latest reply on Mar 23, 2015 by J.Harris


I downloaded the Virtex 4 Verilog code for the HSC-ADC-EVALCZ board. I have it plugged into the AD9643 digital-to-analog converter eval board.

 

When I try to compile the Verilog project using Xilinx ISE ver 14.2, I get the following error:

 

Could not find module/primitive 'addr_lvds_top'

 

The download Xilinx project file didn't seem to include the file that contains this module.

 

Has anyone else run into this problem? Does anyone have a solution?

 

Thanks very much!

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