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Compiling AD FMCOMMS2-EBZ HDL reference code

Question asked by tyl on Mar 23, 2015
Latest reply on Mar 23, 2015 by CsomI

Hi,

 

First I open from directory cf_ad9361_zed HDL reference code using "Xilinx Platform Studio Project" program. After that I try to Complile HDL reference code using "Generate BitStream" button, but I get few errors. Listed below: 

ERROR:EDK:2951 -

   Unknown Tcl procedure ::hw_axi_ad9361_v1_00_a::run_coregen called

ERROR:EDK - axi_ad9361_0 (axi_ad9361) - 

INFO: No asynchronous clock conversions in axi_interconnect axi_interconnect_2.

INFO: No asynchronous clock conversions in axi_interconnect axi_interconnect_3.

ERROR:EDK:440 - platgen failed with errors!

Done!

 

Could somebody tell me what causes these errors and how I can fix them ?. I would like to drive "Generate Bitstream" trought without any errors.

 

Regards,

 

Tyl

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