I'm puzzled about the watchdog reset of this Chip.
After activating the WDTVAL it seems that there is no Reset occuring.
sysreg_write(sysreg_IOPG,WDT_Page); // select watchdog Page
while(0==(io_space_read(WDT_STAT) & WDT_ACTIVE)) // not activated?
io_space_write(WDT_TOVAL,0xFFFF); // will be active after about 2 mSecs on 25MHz clock
(of course I changed the WDT_ACTIVE to 0x0002 in the header file)
since al timers are running as before I'm nearly sure that neither the core nor the peripherals have been
resetted. But the WDT_STAT signals that the WDTOVR bit has been set.
I'm very puzzled...
every help is very appreciated!