AnsweredAssumed Answered

AD9361 setup for maximum bandwidth

Question asked by arvabj on Mar 17, 2015
Latest reply on Mar 20, 2015 by arvabj

For our application we need to configure the AD9361 for maximum Tx and Rx bandwidth reception. From the datasheet i see that the maximum programmable Rx BW is 28 MHz (or 56 MHz double-sided) and on the Tx side the maximum BW is 20 MHz (or 40 MHz double-sided).


I have the VC707 + FMCOMMS-3 board running with the ADI drivers at 2.4GHz default. As a first step i change the clock rates to support maximum sampling rate of 61.44 from the Tx/Rx FIR filter stages. I am assuming the ADI drivers figure out the right Interpolation/Decimation numbers for the digital filter stages.


{983040000, 245760000, 122880000, 61440000, 61440000, 61440000},//uint32_t    rx_path_clock_frequencies[6]

{983040000, 122880000, 122880000, 61440000, 61440000, 61440000},//uint32_t    tx_path_clock_frequencies[6]


I go through the programming sequence and i see Tx and Rx digital filter tuning fails and RF output is corrupted.


ad9361_dig_tune: Tuning RX FAILED!

ad9361_dig_tune: Tuning TX FAILED!


As per the datasheet, all digital filters have a interp/decim by 1 or bypass option. So i thought my settings should work. Ultimately i would like to have the Tx and Rx BW to be updated to 28MHz and 20MHz from the 18MHz default. Please let me know what parameters do i need to change to achieve this, and what clock rates would work.