We have a custom board in which we have interfaced ADV7280M to an application processor. The board is running linux and we are using V4L2 driver to capture the video. We had the power sequencing as per requirements as well we we could see the crystal working fine.
We were able to succesfully read / write to I2C registers of the device , however we were not not able to get a valid video on the MIPI lines. I mean here a valid video up through the V4L2 driver layer captured by the application processor as a H.264 encoded file. We had tried both color bar pattern from ADV7280M as well as tried video from external input ( Single ended CVBS).
We spent many days trying to debug the issue until we discovered that we had to manually assert the RESET input to the ADV7280 low post the driver had loaded ( meaning initialization on I2C had been done succesfully) . After doing this hardware reset step we were able to get the video captured correctly by our application processor.
My question is that why do we need this additional reset to get the video data on MIPI lines because per my understanding even before doing the hardware reset we are successfully able to read / write the I2C registers. Is it that even the MIPI state machine is caught in some wrong state and until a hardware reset is applied and only after we apply the hardware reset a valid MIPI data can be sent out from the ADV7280 device?
can anyone throw some ideas to help us.
Also every time i need to capture video on our application processor we need to apply this extra hardware reset. If this was required only once post power up it would have been OK for us but trying to give it every time before video capture is an additional step for us and is difficult for us to implement in our hardware. Hence we really need to find out why this reset is really required every time?