In my application board host(master) microcontroller (16 bit PIC) is communicating to ADuCM360(slave) via SPI0 port to acquire its ADCs data. Now as in this case host sends the 8 bit command to ADuCM360 on SPI, with all pins appropriately configured on both chips.
Then host is expecting a 32 bit data reply from ADuCM360 without asserting and deasserting CS 4 times for receiving 32 bit data. SPI is configured for 8Mbps. I am able to see(scope) command going from host and CS and SCLK also. i have kept pull up on slave reply line MISO.
i was able to communicate to host means getting reply, if it is only 1 byte long from ADuCM360 . Means if it is just one byte command and one byte reply sequence it works but with long (few uS) gaps between two successive CS assert and deassert signals.
I want to finish the Command and reply cycle in shortest time possible (not more then 6uS when reply is 32 bit long)
What should be the min. time difference between the two chip deassert and assert for ADuCM360.
Can i use continuous transfer mode when ADuCM360 is slave, then what setting will be required in my problem?
Please say if it is possible thing to do technically, and suggest accordingly, I can send program if required.
I will really appreciate the early reply, Thankyou: