The datasheet for AD9136 indicates the DAC clock can be injected directly or using internal PLL. I plan to operate the dual outputs at 2000 MHz, feed each DAC 500 MSPS. The JESD204b interface will be 2 lanes for one link operating at 10G lane speed.
Is there advise on what clock speed to utilize. If using the PLL is there any advantage to running the clock higher than 80 MHz and dividing?