AnsweredAssumed Answered

AXI DMAC SRC ADDRESS

Question asked by MiTfreak on Mar 9, 2015
Latest reply on Mar 10, 2015 by MiTfreak

Hi All,

 

I was testing my implementation I got strange behavior of DAC DMA. Maybe it just works like that.

I manage to solve it, but it was interesting to me. When I initilalize transaction with SRC ADDR 1000000E

at the output I got 7F01 together with bunch of AAAA..., altought bytes 75 and 01 are on address 1000000D

and 1000000C respectively. I do not expect them at the output. This is the content of DDR:


1000000C:  AAAA7F01

10000010:  AAAAAAAA

10000014:  AAAAAAAA

10000018:  AAAAAAAA


Is this normal behavior? should I make offset to align data to new space in memory. Basically is DMAC

reading always whole chunk of 4bytes in memory?


Kind Regards

Outcomes