The data sheet Table.1, it has been defined as the "I2C Serial Clock Period" = Min.2.5us (Fast-mode I2C).
Please tell us about the "Serial Clock Period" time in the case of a Slow-mode I2C.
This means that the maximum clock frequency the part would respond to is 400kHz. If your master is inputing a faster clock to the part, you may not receive acknowledge from the part, and communications will fail.
Otherwise, if your master clock is much slower, it should be no problem.
What is your clock frequency?
Thank you for reply.The maximum clock frequency is also "Slow ADC" I was understood that 400kHz.I think the design because the clock is the frequency about 400kHz ± 5%.
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