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Amplifier design from noise perspective

Question asked by JK_Analog on Mar 8, 2015
Latest reply on Mar 10, 2015 by JK_Analog

Hello Members,


    There has been good application note MS-2022 regarding signal chain design for ADC. However, I have few confusions after going through that application note. I would appreciate if somebody from the community can clarify those,


1. In step-2 of design, there has been mention of noise density of 416nV/sqHz. But is not mentioned whether it is RTI side or RTO side. If it for RTI then I am bit confused as total noise of 4.16uV divided by 10KHz bandwith comes to be 41.6nV/sqHz.


2. Also gain block is of 10 while there has been mentioned we need to design solution which is 1/10th of source noise so that signal chain noise is much less than noise floor of sensor. So I am bit confused by calculation of step-4 in application note.


3. In step-6 it has been shown that total noise over 10KHz of signal chain is 3.04uV which is not 1/10th of 4.16uV. So it goes against the statement that we need to design at 1/10th of source noise. So again confused whether we need to design such that signal chain noise is lesser than noise floor of source noise or we need to design at 1/10th of that.


I will appreciate if somebody can reply my above points,