I've been struggling with getting the AD9129 up and running.
Currently, I am sweeping the phase offset in an attempt to calibrate the bus.
I find at every setting I see one of the following:
1) Lots of parity errors (I poll the parity error counter every second, and see them railed at 255).
2) DLL having issues.
3) Fifo having issues.
When I say that the DLL is having issues, I mean that the DLL is complaining about being at the start or end of the line, or both simulataneously (this seems like an error condition).
When I say that the FIFO is having issues, I mean that the FIFO thermostats are changing alot. I would expect that they would set at a value and click up or down one value, not randomly change. From the data sheet, I assume that the only valid values are a string of zeros followed by a string of ones. So, for example, 0x03 is a valid value, but 0x05 is not a valid value. I also see what I am stating are invalid values.
I added the polling in page 43 of the data sheet (on the fifo reset methodology), to my powerup register sequence on pg 54. I will even see that the part never acknowledges my reset set or reset clear.
To me, it appears that the DLL is not working reliably. The data sheet does not describe the DLL well. What does the DLL do? Does it take the DCO clock and add/subtract delay in order to generate an internal copy of DCI? Or does it have a VCO and attempt to lock the VCO to the DCO? What is the BW of the DLL?