How u guys doing?
Currently we are working on the HD rear-camera solution for automotive market, by using the front-end 720p CMOS sensor with a dedicated DSP, the said DSP provide the 8bit YUV422 output (d0 to d7) with separate H, V and CLK rate at 74.25MHz (which means a total 11pin) to ADV7393), aiming for an analog YPbPr @720p from ADV7393. I have the following questions, basically I hope that ADV7393 works with my signal input, and would appreciate to perform PCB layout after having my questions answered.
- As mentioned from the ADV7393 datasheet, the "DDR" should be required in performing the ED/HD process, does the DDR means the input datarate? As the CLK output from my frontend DSP is at 74.25MHz (also 8bit YUV422 only from D0 to D7), could it work with ADV7393? Given that the video signal output from the front-end DSP is at 720P 60Hz.
Thank you very much!