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[AD7634] Voltage level and reference for PDREF/PDBUF pins at high state

Question asked by gabrielbrunheira on Mar 4, 2015
Latest reply on Mar 6, 2015 by gabrielbrunheira

Hi,

 

In an A/D board under development, I'm using separate ground planes for analog (AGND) and digital (DGND = OGND) references, which can be connected together using a solder jumper or back-to-back schottky diodes underneath the A/D converter, as suggested in Tutorial MT-031 ('Grounding Data Converters and Solving the Mystery of "AGND" and "DGND"').

 

My rails are:

    AVDD = +5V-AN (obtained using a LDO referenced to AGND)

    DVDD = +5V-DIG (obtained using a different LDO referenced to DGND)

    OVDD = +3.3V-DIG (obtained using a LDO referenced to DGND = OGND)

 

I'm using an external reference, so the internal reference must be powered down, i.e., PDREF = PDBUF = High. Table 6 in datasheet states that PDREF e PDBUF pins are digital inputs, so using Table 2, I would assume they should be connect to +3.3V-DIG (máx: OVDD+0.3 = +3.6V).

 

However, Figure 27 shows a circuit example, where the internal reference is used, which is accomplished connecting these pins to the AGND. Now I'm confused if I should connect them to +3.3V-DIG or +5V-AN. It would be EXTREMELY MORE convenient to me if I could connect them to +5V-AN, because of their locations, as showed in the screenshot below (Pin 47 = PDREF; Pin 48 = PDBUF). Otherwise, routing a +3.3V-DIG trace to these pins seems to be messy, because it would be over the AGND plane.

 

What is the correct configuration?

 

Thanks in advance!

 

Gabriel

HRADC PDREF PDBUF Pins.PNG

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