I am confused as to what exactly the "Preventing Bus Traffic Errors" section means, as well as the extent of the problems that can be caused on page 15 of the ADXL375 data sheet. I am running SPI with the ADXL375 and another device sharing a bus. My questions are:
- How likely is it for a SPI command transmitted to another device to look like a valid I²C command?
- What specific conditions cause this phenomenon to occur?
- How would you ensure that "bus traffic can be adequately controlled to ensure that such a condition never occurs"?
- Is is common practice to include the logic gate in your design, and will I be causing software problems if I leave the logic gate out of the design?
Basically we have a finished design (without the logic gate) ready to be manufactured and realized there may be a problem here, I am wondering if I have to redesign to incorporate the logic gate or not. Thank you for your help.