On ADP5090, if using a SUPER capacitor in BAT-pin (I'm no Batman!) instead of a rechargeable battery, can the shutdown discharging voltage (SETSD pin) be lowered below 2V ?
Let's say, could resistor R(SD1) be equal 0, then SETSD voltage would decrease to about Vref (1.21V) ? What are the implications ?
By lowering or disabling the shutdown discharging voltage I would expect to increase the system availability time due capacitor remaining charge.