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Cycle count for Interpolation in FIR Accelerator of ADSP21489

Question asked by MZC on Mar 2, 2015
Latest reply on Jun 3, 2015 by Mitesh



I need to how many PCLK cycles are needed to process interpolation step in FIR Accelerator of ADSP21489? For example, if input sample buffer contains 4 samples which need to produce 32 samples after interpolation process with interpolation factor is 8 so in this case M=8, W=32 and N=100, how many cycles will it be needed? Any theoratical formula is available like given for decimation in Sharc hardware manual?


Best Regards,