I'm working on a software-defined radio design based on the combination of the Analog Devices AD9361 and Zynq SoC.
In our design, the stream of data received from the AD9361 is broken up into logical "packets" in the Zynq PL, with each packet composed of a header containing metadata about the state of the system, followed by some number of time-domain data samples from the 9361. These packets then flow to other units implemented in the Zynq PL for further processing, as well as potentially through a DMA core for transfer directly to the PS memory.
As the IIO subsystem has a significant amount of support in the open-source community, it would be nice to leverage and add to IIO rather than rolling my own DMA buffer framework like I've done in the past on previous projects.
The IIO subsystem and libiio high-throughput buffer API seem to be geared toward data that is simply a "stream of samples" without the additional structure of packet headers/trailers, etc. Are you aware of any users of IIO that stream "packetized" data or how the IIO / libiio buffer system might be modified to support this cleanly (i.e. by optionally returning an "ancillary" metadata block in addition to the samples retrieved using iio_buffer_start/step/stop, etc.)?
It would seem that in order for this to work, the IIO driver would need to be smart enough to ensure that each call to iio_buffer_refill would begin at a packet boundary, which would probably ultimately require the DMA hardware to have some understanding of the packet boundaries. I've started investigating the FMCOMMS5 example design and it seems that the axi_dmac has a provision for ensuring that DMA transfers begin on the first data beat of a packet using the fifo_wr_sync signal (I could be mistaken, my Verilog is not very good).
What else do you think would be required to support such a mode of operation? I'm comfortable writing kernel drivers or modifying libiio if needed.